Regviz

NXP Semiconductors /LPC13xx /IOCON /SWCLK_PIO0_10

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SWCLK_PIO0_10

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/LPC13xx/IOCON/SWCLK_PIO0_10#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SWC)FUNC0 (INACTIVE_NO_PULL_DO)MODE 0 (DISABLE)HYS 0RESERVED 0 (STANDARD_GPIO_OUTPUT)OD 0RESERVED

HYS=DISABLE, FUNC=SWC, MODE=INACTIVE_NO_PULL_DO, OD=STANDARD_GPIO_OUTPUT

Description

I/O configuration for pin SWCLK/PIO0_10/ SCK/CT16B0_MAT2

Fields

FUNC

Selects pin function. All other values are reserved.

0 (SWC): Selects function SWCLK.

1 (PIO): Selects function PIO0_10.

2 (SCK): Selects function SCK0 (only if pin SWCLK/PIO0_10/SCK0/CT16B0_MAT2 selected in Table 139).

3 (CT1): Selects function CT16B0_MAT2.
MODE

Selects function mode (on-chip pull-up/pull-down resistor control)

0 (INACTIVE_NO_PULL_DO): Inactive (no pull-down/pull-up resistor enabled)

1 (PULL_DOWN_RESISTOR_E): Pull-down resistor enabled

2 (PULL_UP_RESISTOR_ENA): Pull-up resistor enabled

3 (REPEATER_MODE): Repeater mode
HYS

Hysteresis

0 (DISABLE): Disable

1 (ENABLE): Enable
RESERVED

Reserved
OD

Selects pseudo open-drain mode.

0 (STANDARD_GPIO_OUTPUT): Standard GPIO output

1 (OPEN_DRAIN_OUTPUT): Open-drain output
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data